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Presenter |
From |
Title |
Go
to Download |
Jozef Hooman
|
ESI |
Performance
Research in the Boderc project |
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Simon Schliecker |
IDA
|
Analysis of
memory and coprocessor accesses on MPSoCs |
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Simon Künzli |
ETHZ |
Hybrid Approach
to System-Level Performance Analysis |
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Jan Madsen |
DTU |
System Modeling
Infrastructure |
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Petru Eles |
Linköping |
ARTIST-Relevant
Research from Linköping: latest results |
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Michela Milano |
DEIS |
System Design
Related Optimization Problems |
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Davide Bertozzi |
UNIFE |
Communication
and I/O architecture for highly integrated MPSoC platforms |
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Jose L. Ayala |
UPM |
Low-power
and Low-temperature Compilation for Embedded Processors |
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Francisco Moya |
UCLM |
An MPSOC Middleware:
Network Transparency for on-chip/off-chip Modules |
|
| Clemens
Moser |
ETHZ |
Power management
for solar-driven sensor nodes |
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Arne Hamann |
IDA |
Sensitivity
analysis & System Robustness Optimization |
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Andrea Acquaviva |
UNIURB |
Energy Awareness
in Batteryless Systems |
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Presenter:
ESI-Jozef Hooman
Title: Performance Research
in the Boderc project
Abstract:
We present an overview of work on performance within
the Boderc project. This includes a comparison of performance
analysis methods on the radio-navigation system. We
also report about industrial performance measurents
and modeling. Finally, we mention control strategies,
such as event-based
control, to improve performance.
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Presenter:
IDA-Simon Schliecker
Title: Analysis of memory and
coprocessor accesses on MPSoCs
Abstract:
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Presenter:
ETHZ-Simon Künzli
Title: Hybrid Approach to System-Level
Performance Analysis
Abstract:
In this talk, we will briefly talk about a new, compositional
performance evaluation method for embedded systems we
developed during the last year. The new method combines
existing approaches for system-level performance analysis;
a formal method and a simulation-based approach. To
enable this combination, we define the interfaces needed
between the different performance evaluation methods.
As a core of the approach, we propose a method to generate
simulation stimuli from analytical models. In addition,
we introduce a measure to assess the quality of a generated
simulation trace with respect to its analytical description.
The combined model was then used for a case study of
an application running on a multiprocessor system.
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Presenter:
DTU- Jan Madsen
Title: System Modeling Infrastructure
Abstract:
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Presenter:
Linköping- Petru Eles
Title: ARTIST-Relevant Research
from Linköping: latest results
Abstract:
Recent results which are relevant from the point of
view of our work in ARTIST will be presented. We will
first present our recent results in the context of communication
dominated embedded systems In this context we will mention
the timing analysis of the FlexRay Communication Protocol
and the timing and buffer analysis for NoCs. Then we
will briefly present our results in the context of predictability
of multiprocessor applications. Here, we are concentrating
on two aspects: (1) execution time estimation for multiprocessor
systems with shared memory access and (2) predictability
in the presence of transient faults.
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Presenter:
DEIS - Michela Milano
Title: System Design Related
Optimization Problems
Abstract:
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Presenter:
UNIFE- Davide Bertozzi
Title: Communication and I/O
architecture for highly integrated MPSoC platforms
Abstract::
As the level of system integration of MPSoC platforms
keeps increasing, communication fabrics are evolving to
support the communication scalability requirements, while
not reverting to revolutionary network-based solutions
yet. This results in complex segmented architectures where
system performance (and eventually energy) tightly depends
on the effectiveness of bus bridges, which are actually
becoming true Intellectual Property blocks. At the same
time, the I/O architecture is becoming the platform bottleneck,
since most of processing data tend to be stored off-chip
for storage size and technology reasons. In this presentation,
I will illustrate the different performance and architectural
requirements posed by the memory controller on the communication
infrastructure in order to sustain system performance.
Finally, the presentation will highlight the research
challenges associated with the optimization of memory
controller architecture.
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|
Presenter:
UPM- Jose L. Ayala
Title: Low-power and Low-temperature
Compilation for Embedded Processors
Abstract:
Advances in process technology allow new embedded devices
to run multimedia applications with high computational
complexity thanks to Very Large Instruction Word (VLIW)
processors and high-performance processors. Also, the
continuing advances in semiconductor technology have
allowed dramatic performance gains for these archtectures.
These improvements are due both to increasing clock
rates as well as to advanced support for exploiting
instruction-level parallelism and memory locality using
the additional transistors available in each process
generation. However, as a negative consequence, this
causes a significant increase in power dissipation.
As technology scales, higher power consumption coupled
with smaller< chip area will result in higher power
density, which in turn will lead< to higher power temperature
on the chip. In fact, extrapolating the changes in microprocessor
organization and the device miniaturization, one can
project future power density to 200 W/cm2. This requires
extensive efforts on cooling techniques which have shown
to be complex and highly expensive. In our work, we
provide a set of characterization methodologies and
compilation-based optimizations which are able to minimize
the power consumption and temperature of the device
without performance impact. Moreover, traditional source-level
transformations have been analyzed and their impact
on the thermal behavior of the processor has been evaluated.
Finally, this work presents a first attempt to achieve
the low-power/low-temperature compilation.
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Presenter:
UCLM - Francisco Moya
Title: An MPSOC Middleware:
Network Transparency for on-chip/off-chip Modules
Abstract:
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Presenter:
ETHZ-Clemens Moser
Title: Power management for
solar-driven sensor nodes
Abstract: Energy harvesting
has recently emerged as a viable option to increase
the lifetime of sensor nodes. In this field, we have
conducted research in order to optimize the energy flow
on a sensor node under real-time predictability constraints.
The node model we are using consists of three major
components: An energy source module, an energy storage
module and a processing module. For this scenario, we
developed scheduling algorithms which are tailored to
the energy-driven nature of this problem. An on-line
scheduling algorithm has been constructed (lazy scheduling),
which is provably optimal if precise information about
the energy resource is available. To this end, both
the energy prediction of the energy harvesting module
as well as the current energy level of the storage module
has to be taken into account. Furthermore, we presented
an admittance test that decides for periodic and bursty
task sets, whether they can be scheduled without deadline
violations. For this purpose, we introduce the concept
of energy variability characterization curves (EVCC).
Finally, the proposed theory leads to practical techniques
for scheduling processes in energy harvesting systems
as has been shown in extensive simulation studies.
|
Presenter:
IDA-Arne Hamann
Title: Sensitivity analysis &
System Robustness Optimization
Abstract:
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Presenter:
UNIURB: Andrea Acquaviva
Title: Energy Awareness in
Batteryless Systems
Abstract:
Environmental energy is becoming a feasible alternative
to traditional sources for energy constrained devices
such as tiny wireless sensor nodes. To efficiently exploit
harvesting energy, innovative management policies must
be designed. In this presentation we discuss two examples
of energy optimization strategies both in local and
network context that show how batteryless devices can
profit from environmental energy. First, we present
an adaptation strategy based on device reconfiguration
that exploits the intrinsic unpredictability of environmental
energy to opportunistically trigger task remapping on
reconfigurable hardware. Second, we formulate the problem
of routing optimization for energy harvesting wireless
sensor networks (EHWSNs), where the objective function
changes from network lifetime as in battery operated
ones, to sustainable workload. We finally present an
optimal solution to this problem based on graph algorithms.
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Other
Partecipants
Lothar
Thiele ETHZ
Luca
Benini UNIBO
Alexandru
Andrei LIU
Kai
Huang ETHZ
Martino
Ruggiero UNIBO
Federico
Angiolini UNIBO
Alessio Guerri UNIBO
Simone
Medardoni UNIFE
Davide
Brunelli UNIBO
Elisabetta
Farella UNIBO
Rolf
Ernst IDA
Shankar Mahadevan DTU
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