International Journals



  1. M. Damiani,   P. Olivo,   M. Favalli,   B. Riccò
    An Analytical Model for the Aliasing Probability in Signature Analysis Testing
    IEEE Transactions on Computer Aided Design
    vol. CAD-8, pp. 1133-1144, Nov., 1989.


  2. M. Favalli,   P. Olivo,   M. Damiani,   B. Riccò
    Novel Design for Testability Schemes for CMOS ICs
    IEEE Journal of Solid State Circuits
    vol. SC-25, pp. 1239-1246, Oct., 1990.


  3. M. Damiani,   P. Olivo,   M. Favalli,   S. Ercolani,   B. Riccò
    Aliasing in Signature Analysis Testing with Multiple-Input Shift-Registers
    IEEE Transactions on Computer Aided Design
    vol. CAD-9, pp. 1344-1353, Dec., 1990.


  4. M. Favalli,   P. Olivo,   B. Riccò
    A Novel Critical Path Heuristic for Fast Fault Grading
    IEEE Transactions on Computer Aided Design
    vol. CAD-10, pp. 544-548, Apr., 1991.


  5. M. Favalli,   P. Olivo,   F. Somenzi,   B. Riccò
    Fault Simulation for General FCMOS ICs
    Journal of Electronic Testing, Theory and Applications
    vol. 2, pp. 181-190, Jun., 1991.


  6. M. Favalli,   P. Olivo,   M. Damiani,   B. Riccò
    Fault Simulation of Unconventional Faults in CMOS Circuits
    IEEE Transactions on Computer Aided Design
    vol. CAD-10, pp. 677-682, May., 1991.


  7. S. Ercolani,   M. Favalli,   M. Damiani,   P. Olivo,   B. Riccò
    Testability Measures in Pseudorandom Testing
    IEEE Transactions on Computer Aided Design
    vol. CAD-11, pp. 794-800, Jun., 1992.


  8. M. Favalli,   P. Olivo,   B. Riccò
    A Probabilistic Fault Model for "Analog" Faults in Digital CMOS Circuits
    IEEE Transactions on Computer Aided Design
    vol. CAD-11, pp. 1459-1462, Nov. , 1992.


  9. M. Favalli,   P. Olivo,   B. Riccò
    Dynamic Effects in the Detection of Bridging Faults in CMOS ICs
    Journal of Electronic Testing, Theory and Applications
    vol. 3, pp. 197-205, Aug. , 1992.


  10. M. Lanzoni,   M. Favalli,   P. Olivo,   B. Riccò
    An Experimental Study of Testing Techniques for Bridging Faults in CMOS ICs
    IEEE Journal of Solid State Circuits
    vol. 28, pp. 686-690, Jun., 1993.



  11. M. Favalli,   M. Dalpasso,   P. Olivo,   B. Riccò
    Analysis of Resistive Bridging Fault Detection in BiCMOS Digital ICs
    IEEE Transactions on VLSI Systems
    vol. 1, pp. 342-355, Sep., 1993.


  12. M. Dalpasso,   M. Favalli,   P. Olivo,   B. Riccò
    Fault Simulation of Parametric Bridging Faults in CMOS ICs
    IEEE Transactions on Computer Aided Design
    vol. CAD-12, pp. 1403-1410, Sep., 1993.


  13. C. Metra,   M. Favalli,   B. Riccò
    Novel 1-out-of-n CMOS checker
    IEE Electronics Letters
    vol. 30, pp. 1398-1400, Aug., 1994.


  14. C. Metra,   M. Favalli,   B. Riccò
    Design of CMOS self-checking sequential circuits with improved detectability of bridging faults
    IEE Electronics Letters
    vol. 30 No.23, pp. 1934-1936, Nov., 1994.


  15. M. Dalpasso,   M. Favalli,   P. Olivo,   J. P. Teixeira
    Realistic Testability Estimates for CMOS IC's
    IEE Electronics Letters
    vol. 30 No.19, p. 1593-1595, Sep., 1994.


  16. C. Metra,   M. Favalli,   P. Olivo,   B. Riccò
    Design of CMOS Checkers with Improved Testability of Bridging and Transistor Stuck-on Faults
    Journal of Electronic Testing, Theory and Applications
    vol. 6, pp. 7-22, Feb., 1995.


  17. C. Metra,   M. Favalli
    Novel 1-out-of-n Dynamic CMOS Checker
    IEE Electronics Letters
    vol. 31, Nov., 1995.


  18. C. Metra,   M. Favalli,   B. Riccò
    Design of TSC CMOS Checkers for any 1-out-of-n Code
    Journal of Microelectronic Systems Integration
    vol. 3 No.2, pp. 81-91, 1995.


  19. M. Favalli,   C. Metra
    Sensing circuit on-line detection of delay faults
    IEEE Transactions on VLSI Systems
    vol. 4, n. 1, pp. 130-133, Mar., 1996.

  20. M. Favalli,   M. Dalpasso,   P. Olivo
    Modeling and Simulation of Broken Connections in CMOS ICs
    IEEE Transactions on Computer Aided Design
    vol. 5, n. 7, pp. 808-814, Jul., 1996.



  21. M. Dalpasso,   M. Favalli,   P. Olivo
    IDDQ test invalidation by break faults
    IEE Electronic Letters
    vol. 32, n. 11, pp. 944-946, , 1996.



  22. M. Dalpasso,   M. Favalli
    A Method for Increasing the IDDQ Testability
    IEEE Transactions on Computer Aided Design
    vol. 16, no. 10, pp. 1186-1188, Oct., 1997.



  23. C. Metra,   M. Favalli,   B. Riccò
    On-Line Self-Testing Voting and Detecting Schemes for TMR Systems
    Journal of Microelectronic Systems Integration
    vol. 5, no. 4, pp. 261-273, Dec., 1997.



  24. C. Metra,   M. Favalli,   P. Olivo,   B. Riccò
    On-Line Detection of Bridging and Delay Faults in Functional Blocks of CMOS Self-Checking Circuits
    IEEE Transactions on Computer Aided Design
    vol. 16, no. 7, pp. 770-776, Jul., 1997.



  25. M. Favalli,   M. Dalpasso
    Symbolic handling of bridging fault effects
    Journal of Electronic Testing, Theory and Applications
    vol. 10, n. 3, pp. 271-276, Jun., 1997.



  26. C. Metra,   M. Favalli,   B. Riccò
    1-out-of-3 Code Checker with Single Output
    IEE Electronics Letters
    vol. 33, p. 1373, 1997.


  27. M. Favalli,   C. Metra
    Design of Low-Power CMOS Two-Rail Checkers
    Journal of Microelectronic Systems Integration
    vol. 5, n. 2, pp. 101-110, Jun., 1997.


  28. C. Metra,   M. Favalli,   B. Riccò
    Concurrent Checking of Clock Signal Correctness
    IEEE Design&Test of Computers
    pp. 42-48, Oct., 1998.


  29. L. Benini,   A. Bogliolo,   M. Favalli,   G. De Micheli
    Regression models for behavioral power estimation
    Integrated Computer-Aided Engineering
    vol. 5, pp. 95-106, Feb., 1998.



  30. Michele Favalli,   Cecilia Metra
    Bus crosstalk fault detection capabilities of error detecting codes for on-line testing
    IEEE Transactions on VLSI Systems
    vol. 7, no. 3, pp. 392-396, Sep., 1999.

  31. C. Metra,   M. Favalli,   B. Riccò
    Signal Coding and CMOS Gates for Combinational Functional Blocks of Very Deep Submicron Self-Checking Circuits
    VLSI Design
    vol. 11-1, pp. 23-34, Jan., 2000.


  32. M. Favalli,   C. Metra
    Bridging Faults in Pipelined Circuits
    Journal of Electronic Testing, Theory and Applications
    vol. 16-6, pp. 617-629, Dec., 2000.


  33. A. Bogliolo,   M. Favalli,   M. Damiani
    Enabling testability of fault-tolerant circuits by means of IDDQ-checkable voters
    IEEE Transactions on VLSI Systems
    vol. 8, no. 4, pp. 415-419, Aug., 2000.


  34. C. Metra,   M. Favalli,   B. Riccò
    Self-Checking Detection and Diagnosis Scheme for Transient, Delay and Crosstalk Faults Affecting Bus Lines
    IEEE Transactions on Computers
    vol. 49, no. 3, pp. 560-574, Jun., 2000.


  35. M. Favalli,   C. Metra
    Online Testing Approach for Very Deep-Submicron ICs
    IEEE Design&Test of Computers
    vol., pp. 16-23, Mar., 2002.


  36. M. Favalli,   M. Dalpasso
    Bridging fault modeling and simulation for deep submicron CMOS ICs
    IEEE Transactions on Computer Aided Design
    vol. 21, no. 8, pp. 941-953, Aug., 2002.


  37. C. Metra,   M. Favalli,   S. Di Francescantonio,   B. Riccò
    On-Chip Clock Faults' Detector
    Journal of Electronic Testing, Theory and Applications
    vol. 18-4, pp. 555-564, Aug., 2002.


  38. M. Favalli,   C. Metra
    Single Output Distribute Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures
    Journal of Electronic Testing, Theory and Applications
    vol. 18, pp. 273-283, Mar., 2002.

  39. C. Metra,   S. Di Francescantonio,   M. Favalli B. Riccò
    Scan Flip-Flops with On-Line Testing Ability with respect to input Delay and Crosstalk Faults
    Microelectronics Journal
    vol. 34, n. 1, pp. 100-110, Jan., 2003.


  40. C. Metra,   L. Schiano,   M. Favalli
    Concurrent Detection of Power Supply Noise
    IEEE Transactions on Reliability
    vol. 52, No. 4, pp. 469-475, Dec., 2003.


  41. M. Favalli,   C. Metra
    TMR Voting in the Presence of Crosstalk Faults at the Voter Inputs
    IEEE Transactions on Reliability
    Vol. 53, No. 3, pp. 342 - 348, Sep., 2004.


  42. M. Fa valli
    A fuzzy model for path delay fault detection
    IEEE Transactions on VLSI Systems
    Vol. 11, No. 8, pp. 943 - 956, Aug., 2005.